• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    The present invention is to increase the opening ratio of the liquid crystal display device, the semiconductor layer is formed in a predetermined pattern on the transparent substrate, a portion of the semiconductor layer is implanted to form a lower electrode of the storage capacitor, the gate on the front of the semiconductor layer An insulating film is deposited, and two layers of conductive materials are patterned on a portion of the gate insulating film to form a predetermined shape to form an upper electrode portion of the gate line and the storage capacitor, and ions are injected into the semiconductor layer using the gate line as a mask to drain and source. After forming the region, the upper and lower electrodes of the storage capacitor are transparently formed by removing a portion of the conductive material on the upper electrode portion to form the upper electrode of the storage capacitor. Therefore, the liquid crystal display manufactured according to the present invention has a higher aperture ratio than the transparent electrode of the storage capacitor as compared with the prior art, and thus has better image quality than the conventional art.
    公开号:KR19990042252A
    申请号:KR1019970063016
    申请日:1997-11-26
    公开日:1999-06-15
    发明作者:김홍규
    申请人:구자홍；엘지전자 주식회사；
    IPC主号:
    专利说明:

    Manufacturing method of liquid crystal display device
    BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flat panel display device, and more particularly, to a liquid crystal display device and a manufacturing method thereof.
    The liquid crystal display device is the display device with the highest commercialization rate among flat panel display devices that can replace the CRT monitor. The liquid crystal display device is composed of a liquid crystal panel and a driving circuit for driving the liquid crystal panel. The liquid crystal panel includes a polarizer, a color filter, a top plate having a common electrode, a gate line, a data line, a thin film transistor, and a pixel electrode. It consists of the formed lower plate and the liquid crystal injected between the upper plate and the lower plate. In this case, the common electrode may be installed on the lower plate as well as the upper plate.
    The pixel portion of the liquid crystal display device having the common electrode disposed on the lower plate will be described in detail as follows. FIG. 1 illustrates a thin film transistor and a pixel electrode 16 formed at an intersection of a gate line and a data line of a lower plate. The lower plate is formed so that a plurality of gate lines and data lines are orthogonal to each other, and a thin film transistor and a pixel electrode are formed at an intersection thereof.
    The manufacturing method of the conventional liquid crystal display shown in FIG. 1 will be described with reference to the accompanying drawings. FIG. 2 is a cross-sectional view illustrating a method of manufacturing a liquid crystal panel based on the cross-sectional view taken along line II ′ of FIG. 1. First, a polysilicon 21 to be used as a channel layer is deposited on the transparent insulating substrate 20 as shown in FIG. 2A. In order to form the lower electrode of the storage capacitor, the photoresist sheet 23 is patterned into a predetermined shape as shown in FIG. 2B, and ions 24 are implanted into the polycrystalline silicon. Then, the polysilicon of the portion not covered by the photoresist is turned into the impurity semiconductor 21 ', and the impurity semiconductor is adopted as the lower electrode of the storage capacitor in a later process. At this time, a material such as Boron or Phosphorus is used as the impurity to be injected. In the process, the polysilicon of the portion where the impurity is not implanted is later used as the active region of the thin film transistor.
    After the photoresist is removed as shown in FIG. 2C, the gate insulating film 25 is formed on the polysilicon, and conductive materials 26 ', 26' ', 26' '', 26 '' '' are formed thereon. Patterning is performed to form gate lines 26 '' 'and 26' '' 'and common electrode wirings 26' and 26 ''. Part of the common electrode wiring is adopted as the upper electrode of the storage capacitor. In this case, an impurity semiconductor or a silicide-based material such as WSix is formed as a double layer to reduce wiring resistance. Next, as in the case of forming the lower electrode of the storage capacitor, Boron or Phosphorus is ion-implanted in polycrystalline silicon and heat treated to form the source and drain regions of the thin film transistor device in some regions of the semiconductor material.
    Following the process of FIG. 2C, as shown in FIG. 2D, the first interlayer insulating film 27 is deposited on the entire surface of the substrate, and then a part of the first interlayer insulating film and the gate insulating film on the source region is removed to remove the metal contact holes. contact hole 28). Subsequently, as shown in FIG. 2E, metal is deposited and patterned to form a data line.
    As shown in FIG. 2F, a second interlayer insulating film 30 is deposited on the entire surface of the substrate after the process up to FIG. 2E, and a black matrix 31 film is formed thereon. Thereafter, as shown in FIG. 2G, the planarization film 40 is formed by using an oxide film, a silicon on glass (SOG), or the like in order to flatten the rugged surface. A portion of the insulating film, the second interlayer insulating film, and the gate insulating film are removed to form a pixel electrode contact hole 41.
    Subsequently, as illustrated in FIG. 2H, ITO is deposited and patterned to be connected to the impurity semiconductor through the pixel electrode contact hole to form the pixel electrode 16. Thereafter, a pad opening process is performed to complete the lower plate production (not shown in the drawing).
    The liquid crystal panel manufactured from the conventional lower plate completed in FIG. 2 has the following problems. First of all, the upper electrode of the storage capacitor is composed of polysilicon and silicon double layers 26 'and 26' ', so it is opaque despite being located in the pixel portion of the liquid crystal display. Opaque means that light is not transmitted, which leads to a problem that the aperture ratio of the liquid crystal display is lowered.
    That is, since the upper electrode of the storage capacitor is formed of the same material as the gate electrode, there is a problem that the storage capacitor is opaque. Therefore, the rate of light transmission through the pixel electrode is reduced by the area occupied by the storage capacitor, thereby reducing the overall aperture ratio. Among the factors that determine the performance of the liquid crystal display device, the aperture ratio of the panel has a significant influence. Accordingly, there is a need for a method of manufacturing a liquid crystal panel that generates a storage capacitor without reducing the aperture ratio.
    The present invention is to increase the aperture ratio of a liquid crystal display device, and an object thereof is to increase the aperture ratio, in particular, by forming the storage capacitor portion transparently.
    1 is a plan view illustrating a thin film transistor and a pixel electrode formed at an intersection of a gate line and a data line of a lower plate in a conventional liquid crystal display.
    2A to 2H are cross-sectional views illustrating a method of manufacturing a conventional liquid crystal display device based on the section II ′ of FIG. 1.
    3 is a plan view showing in detail a pixel portion of a liquid crystal display manufactured by the present invention.
    4 is an equivalent circuit diagram of FIG. 3.
    5A through 5J are cross-sectional views illustrating a method of manufacturing a liquid crystal display device according to an embodiment of the present invention, based on the section II-II ′ of FIG. 3.
    FIG. 6 is a partial plan view showing a connection portion between a common voltage wiring and a black matrix in the liquid crystal display of the present invention.
    7A through 7B are cross-sectional views illustrating a process of connecting the black matrix and the common voltage wiring in FIG. 7 with reference to the section III-III ′ of FIG. 6.
    Explanation of symbols for main parts of the drawings
    100: transparent substrate 110: polysilicon
    111 impurity semiconductor 115 ion
    120: photoresist 130: gate insulating film
    140: conductive material of the lower electrode portion
    140 ': conductive material of lower gate line
    145: conductive material of the upper upper electrode portion
    145 ': conductive material of upper gate line
    150: first interlayer insulating film 155: first contact hole
    160: data line (signal line) 160 ': common voltage wiring
    170: second interlayer insulating film 175: second contact hole
    180: black matrix 180 ': common electrode wiring
    190: planarization film 195: third contact hole
    200: pixel electrode (transparent electrode) 300: contact portion
    300 ': contact hole
    A method of manufacturing a liquid crystal display according to the present invention includes forming a semiconductor layer in a predetermined region on a substrate, implanting impurities into a storage capacitor forming region of the semiconductor layer to form a lower electrode of the storage capacitor, and forming a gate over the semiconductor layer. Depositing an insulating film, a first electrode material, and a second electrode material, and patterning the first electrode material and the second electrode material to form a gate electrode on the thin film transistor region in the semiconductor layer, and a storage on the storage capacitor region. Forming an upper electrode of the capacitor, removing a portion of the upper electrode of the storage capacitor to a predetermined depth to make a portion of the storage capacitor in the pixel region transparent, and forming a first interlayer on the front surface of the substrate including the gate electrode. Deposition and patterning the insulating film to expose the source region in the semiconductor layer And forming a data line on the first interlayer dielectric layer so as to be connected to the source region exposed in the above process, and depositing and patterning a second interlayer dielectric layer on the front surface of the substrate including the data line to form an upper portion of the storage capacitor. Exposing a portion of the electrode, forming a black matrix on the second interlayer insulating film on the data line so as to be connected to the upper electrode of the storage capacitor exposed in the above process, and planarizing the entire surface of the substrate including the black matrix. Depositing and patterning a film to expose the drain region of the semiconductor layer, and forming a pixel electrode on the planarization film of the pixel region to be connected to the exposed drain region in the above process. In addition, the method of manufacturing a liquid crystal display device according to the present invention may include forming a common voltage line at the same time when the data line is formed, and connecting the black matrix and the common voltage line at the same time when the pixel electrode is formed.
    Hereinafter, a manufacturing method of a liquid crystal display according to the present invention will be described with reference to the accompanying drawings. 3 is a detailed view of a pixel portion of a liquid crystal panel manufactured according to the present invention, FIG. 4 is an equivalent circuit diagram of FIG. 3, and FIG. 5 is a manufacturing process based on the II-II 'cross section of FIG.
    First, as shown in FIG. 5A, a poly-silicon 110 used as an active layer is formed on a transparent insulating substrate 100 such as glass or quartz to form a predetermined shape. As shown in FIG. 5B, the photoresist 120 is coated on the entire surface of the polysilicon to define a region to be used as the lower electrode of the storage capacitor, and then patterned, and the ions 115 of impurities such as boron and phosphorus are patterned. Ion implantation into the polycrystalline silicon forms the lower electrode of the storage capacitor.
    Thereafter, as shown in Fig. 5C, the photoresist is removed, and a gate insulating film 130 is deposited on the polysilicon. The conductive material is deposited and patterned on the gate insulating layer to form gate lines 140 and 140 'and upper electrode portions (common electrodes) 145 and 145' of the storage capacitor. At this time, the conductive material is composed of a double film using an impurity semiconductor and a silicide-based material in order to reduce wiring resistance.
    Subsequently, the source and drain regions are formed by injecting ions 115 of impurities such as boron and phosphorus into portions of the polysilicon except for the portion covered by the conductive material, as in the case of forming the lower electrode of the storage capacitor in the next process. do. In the above process, polycrystalline silicon to which ions are not implanted corresponds to an active layer or a channel layer of a thin film transistor.
    Thereafter, only a part of the upper conductive material 145 and the lower conductive material 140 remain slightly in the double layer formed of the upper electrode portion as shown in FIG. 5D. The thickness is made into about 20 nm-about 40 nm. This is the upper electrode of the storage capacitor formed through the present invention. At this time, a portion of the upper conductive material 145 and a portion of the lower conductive material is removed is a portion located in the pixel area of the liquid crystal display. In addition, since the thin part in which only a conductive material of the lower layer is left through this process is transparent, light is well transmitted. In this case, the lower conductive material 140 uses polycrystalline silicon containing impurities.
    After the first interlayer insulating film 150 is deposited on the entire surface of the substrate after the process up to FIG. 5D, a portion of the first interlayer insulating film and the gate insulating film on the impurity semiconductor layer corresponding to the source region is shown in FIG. 5E. To form a first contact hole (155).
    As shown in FIG. 5F, a conductive film is deposited on the first interlayer insulating layer to be in contact with the source region through the first contact hole to form the source electrode of the data line 160 and the thin film transistor. The conductive film of the portion in contact with the source region corresponds to the source electrode of the thin film transistor. As the conductive film, a metal material such as aluminum (Al) is used.
    Thereafter, the second interlayer insulating film 170 is deposited on the entire surface of the substrate after the process up to FIG. 5F, and then as shown in FIG. 5G, the first interlayer on the conductive material in the portion where the upper layer film is not removed from the upper electrode portion. A portion of the insulating film and the second interlayer insulating film are removed to form the second contact hole 175. As shown in FIG. 5H, black matrices 180 and 180 ′ are formed on the second interlayer insulating layer so as to contact the conductive material through the second contact hole. Of course, the black matrix is also formed on the second interlayer insulating film on the data line. At this time, the black matrix and the common electrode wiring should be connected, which will be described later in FIG.
    After the process of FIG. 5H, the planarization film 190 is formed using an oxide film or SOG (Silicon On Glass) to make the surface of the deposited material flat. Then, as shown in FIG. 5I, the planarization film and the first interlayer insulating film are formed. And a portion of the second interlayer insulating film and the gate insulating film are removed to form a third contact hole 195 to expose the drain region.
    Subsequently, the pixel electrode 200 and the drain electrode are formed by applying a transparent electrode such as ITO on the planarization film so as to contact the drain region through the third contact hole (FIG. 5J). A portion of the pixel electrode formed of the transparent electrode contacting the drain region corresponds to the drain electrode of the thin film transistor.
    Although not shown in the drawing, after this, the pad opening (PAD OPEN) process of the lower plate is performed to complete the lower plate production of the liquid crystal panel of the present invention.
    A method of connecting the black matrix formed through the process of FIG. 5H to an external common electrode wiring will be described. FIG. 6 is a plan view illustrating the common electrode wiring 160 'and the black matrix 180 of the liquid crystal panel, and FIGS. 7A and 7B illustrate a manufacturing method drawn with reference to the section III-III' of FIG. The black matrix and the upper electrode of the storage capacitor are connected. In the process of FIG. 5I, a portion of the first interlayer dielectric layer 150, the second interlayer dielectric layer 170, and the planarization layer 190 are removed to expose a portion of the black matrix and the external common voltage wiring as shown in FIG. 6A. Drill the contact hole 300 '. When the pixel electrode is formed in the process of FIG. 5J, the transparent electrode 200 is deposited to simultaneously connect the black matrix and the common voltage wiring through the contact hole as shown in FIG. 6B. In this way, the upper electrode of the storage capacitor, the common voltage wiring, and the black matrix are connected.
    The liquid crystal display device completed through the manufacturing method of the present invention is formed with a pixel region of the matnics shape and a source region and a drain region in each pixel region, and is located between the semiconductor layer and each pixel region used as a lower electrode of the storage capacitor. A data line formed in contact with a source region of each semiconductor layer, a gate line formed between each pixel region, and a gate line formed to be orthogonal to the data line, parallel to the gate line, formed over each pixel region, and having transparency in the pixel region portion. A black matrix layer in contact with the upper electrode line of the capacitor, an upper electrode line of the storage capacitor and formed on the data line and the gate line to block light, and a pixel electrode formed in each pixel region in contact with the drain region of the semiconductor layer It consists of. The black matrix layer is connected to the common electrode using the same material as the pixel electrode. Of course, the pixel electrode is a transparent conductive film mainly used for ITO.
    Unlike the conventional liquid crystal display device, the upper electrode of the storage capacitor is made of polycrystalline silicon of thin impurities. Therefore, in the liquid crystal display device manufactured according to the present invention, both the upper electrode and the lower electrode of the storage capacitor located in the pixel area are transparent. Therefore, light can be further transmitted through the transparent storage capacitor, thereby increasing the aperture ratio of the liquid crystal display. That is, the liquid crystal display device manufactured according to the present invention is transparent because the upper electrode of the storage capacitor is improved compared to the conventional liquid crystal display device, the image quality is better than the conventional.
    权利要求:
    Claims (7)
    [1" claim-type="Currently amended] A liquid crystal display device having a plurality of gate lines and data lines formed to be orthogonal to each other between a pixel area in a matrix form and the pixel area:
    A semiconductor layer having a source region and a drain region in each pixel region on the substrate and used as a lower electrode of the storage capacitor;
    A data line formed in contact with the source region of each semiconductor layer;
    An upper electrode line of the storage capacitor formed in the same direction as the gate line over the pixel area and formed in a thin thickness in each pixel area to have transparency;
    A black matrix layer in contact with an upper electrode line of the storage capacitor and formed on the data line and the gate line to block light;
    And a pixel electrode in contact with a drain region of each semiconductor layer and formed in each pixel region.
    [2" claim-type="Currently amended] The liquid crystal display of claim 1, wherein the black matrix layer is connected to a common electrode.
    [3" claim-type="Currently amended] The liquid crystal display device according to claim 2, wherein the black matrix layer and the common electrode are connected to the same material as the pixel electrode.
    [4" claim-type="Currently amended] The liquid crystal display device according to claim 3, wherein the pixel electrode material is ITO.
    [5" claim-type="Currently amended] The upper electrode line of the storage capacitor in contact with the black matrix layer is a double layer made of poly-silicon and a silicide-based material, and the upper electrode of the storage capacitor of the pixel region. And the line is a single film made of polycrystalline silicon.
    [6" claim-type="Currently amended] In a liquid crystal display device having a plurality of gate lines and data lines formed to be orthogonal to each other between a pixel area in a matrix form and the pixel area:
    Forming a semiconductor layer in a predetermined region on the substrate, and implanting impurities into the storage capacitor forming region of the semiconductor layer to form a lower electrode of the storage capacitor;
    After forming a gate insulating film on the semiconductor layer, a first electrode material and a second electrode material are sequentially deposited and patterned on the gate insulating film to form a gate electrode on the thin film transistor region of the semiconductor layer. Forming a storage capacitor upper electrode on the storage capacitor region;
    Removing a portion of the storage capacitor upper electrode to a predetermined depth to make a portion of the storage capacitor upper electrode of the pixel area transparent;
    Forming and patterning a first interlayer insulating film on the entire surface of the substrate including the gate electrode to expose a source region of the semiconductor layer;
    Forming a data line on the first interlayer dielectric layer so as to be connected to the exposed source region;
    Forming and patterning a second interlayer insulating film on an entire surface of the substrate including the data line to expose a portion of the upper electrode of the storage capacitor in the pixel area;
    Forming a black matrix on a data line to be connected to the exposed storage capacitor upper electrode;
    Forming and patterning a planarization film on the entire surface of the substrate including the black matrix to expose the drain region of the semiconductor layer;
    And forming a pixel electrode on the planarization layer of the pixel region so as to be connected to the exposed drain region.
    [7" claim-type="Currently amended] The method of claim 6, further comprising: forming a common electrode wiring at the same time as the data line and forming a first interlayer insulating layer on the data line and the common electrode wiring;
    And removing a portion of the black matrix on the black matrix to expose a portion of the black matrix, forming the pixel electrode and simultaneously connecting the exposed black matrix and the common electrode wiring.
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    同族专利:
    公开号 | 公开日
    KR100267994B1|2000-10-16|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    1997-11-26|Application filed by 구자홍, 엘지전자 주식회사
    1997-11-26|Priority to KR1019970063016A
    1999-06-15|Publication of KR19990042252A
    2000-10-16|Application granted
    2000-10-16|Publication of KR100267994B1
    优先权:
    申请号 | 申请日 | 专利标题
    KR1019970063016A|KR100267994B1|1997-11-26|1997-11-26|method for manufacturing of Liquid Crystal Display|
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